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Von Neumann Architecture

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The structure and organization of virtually all modern computers are based on a single theoretical model of computer design called the Von Neumann architecture, named after the brilliant mathematician John Von Neumann who proposed it in 1946. The Von Neumann architecture is based on the following three characteristics: Four major subsystems called memory, input/output, the arithmetic/ logic unit (ALU), and the control unit. These four subsystems are diagrammed in Figure 5.2. The ALU and the control unit are often bundled together in what is called the Central Processing Unit or CPU. The stored program concept, in which the instructions to be executed by the computer are represented as binary values and stored in memory. The sequential execution of instructions, in which one instruction at a time is fetched from memory and passed to the control unit, where it is decoded and executed. Memory and Cache Memory is the functional unit of a computer that stores and retrieves the instructions ...

Instruction Format and Assembly Language

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Machine Language Instructions.  The instructions that can be decoded and executed by the control unit of a computer are represented in machine language. Instructions in this language are expressed in binary, and a typical format is shown in Figure 5.14.  The operation code field (referred to by the shorthand phrase op code) is a unique unsigned integer code assigned to each machine language operation recognized by the hardware. For example, 0 could be an ADD, 1 could  be a COMPARE, and so on. If the operation code field contains k bits, then  the maximum number of unique machine language operation codes is 2^k. The address field(s) are the memory addresses of the values on  which  this operation will work. If our computer has a maximum of 2^N memory cells, then each address field must be N bits wide to enable us to address every cell because it takes N binary digits to represent al addresses in the range 0 to 2^N— 1. The number of address fields in an instr...

Instruction Execution

The execution of a program on the computer  proceeds in three distinct phases: fetch, decode, and execute. These three steps are repeated for every instruction, and they continue until either the computer executes a HALT instruction or there is a fatal error that prevents it from continuing (such as an illegal op code, a nonexistent memory address, or division by zero). Algorithmically, the process can be described as follows: While we do not have a HALT instruction or a fatal error     Fetch phase      Decode phase      Execute phase End of the loop This repetition of the fetch/decode/execute phase is called the Von Neumann cycle. To describe the behavior of our computer during each of these three phases, we will use the following notational conventions: CON(A)      The contents of memory cell A. We assume that an    instruction occupies 1 cell. A—>B           Send the value stored in...